RISC-V SoC Integration

This technology implements a Post-Quantum Cryptographic (PQC) accelerator to integrate it inside a System On Chip (SoC) for FPGA. The module, implemented in a High-Level Synthesis (HLS) approach, accelerates two PQC schemes, the CRYSTALS-Kyber and the CRYSTALS-Dilithium. On the one hand, CRYSTALS-Kyber is a key-encapsulation mechanism (KEM) belonging to asymmetric cryptography. Whose security is based on the difficulty of solving the learning-with-errors (LWE) problem over module lattices. On the other hand, CRYSTALS-DIlithium is a Digital Signature Scheme (DSS). It is strongly secure under chosen message attacks based on the hardness of lattice problems over module lattices. The security notion means that an adversary with access to a signing oracle cannot produce a signature of a message whose signature he hasn't yet seen nor produce a different signature of a message he already saw signed. Then, both schemes (Kyber and Dilithium) are the candidate algorithms to be standardized by the NIST post-quantum cryptography project.

Post-quantum cryptography accelerators for FPGA-based SoCs, especially RISC-V platforms and embedded secure systems; hardware acceleration of NIST -standard CRYSTALS- Kyber/ML-KEM key exchange and CRYSTALS-Dilithium/ML-DSA digital signatures; secure boot, firmware authentication, encrypted communication, and key establishment in long-lifecycle devices; FPGA prototyping and HLS-based research for PQC hardware/software co-design.

Semiconductor teams building secure RISC-V SoCs with post-quantum cryptography support; Defence, aerospace, automative, telecom, and critical-infrastructure integrators preparing for PQC migration; FPGA/ASIC prototyping groups needing inspectable ML-KEM and ML-DSA accelerator blocks; Universities and research labs working on cryptographic hardware, HLS design flows, and PQC benchmarking.