Institution:
The Safe Statistics Unit (SafeSU for short) is an RTL IP that implements several mechanisms for multicore timing interference verification, validation, and monitoring.
BSC Group: Computer Sciences
Guillem Cabo Pitarch
The Safe Statistics Unit (SafeSU for short) is an RTL IP that implements several mechanisms for multicore timing interference verification, validation, and monitoring. It has been integrated into commercial space-graded RISC-V and SparcV8 MPSoCs.
Safety Supports, RISC-V, Software, Hardware
Technology Readiness Level (1-9): N/A
Protection:
MIT License
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