SafeLS

RISC-V open-source lockstep core based on Frontgrade Gaisler AB's NOEL-V core for the space domain

Institution:

Research Group:

Researcher/s:

Marcel Sarraseca Julian, Sergi Alcaide Portet

Website:

https://github.com/bsc-loca/SafeLS

Description:

SafeLS (Safe Lockstep): The Safe Lockstep (SafeLS for short) unit is a RISC-V open-source lockstep core based on Frontgrade Gaisler AB's NOEL-V core for the space domain, as well as its integration in the SELENE SoC that provides a complete microcontroller synthesizable on FPGA successfully assessed against space, automotive, and railway safety-critical applications in the past.

Problem:

N/A

Solution:

N/A

Aplication areas:

For use in automotive, avionics, spacial, robotics, railways or healthcare areas.

Novelty:

N/A

Protection:

GPL License (Version 3.0)

Target market:

N/A

Keywords:

safety supports, risc-v

TRL: N/A

CRL: N/A

BRL: N/A

IPRL: N/A

TmRL: N/A

FRL: N/A

More information

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